Verilator

Open-source tool used for the simulation and verification of digital circuits. It converts Verilog hardware description language (HDL) code into C++ or SystemC code, enabling high-speed, cycle-accurate simulation of hardware designs. Verilator is primarily used by developers of complex digital systems, such as processors and system-on-chip (SoC) designs.

Verilator was discovered on May 2nd 2023 and it currently has a search volume of 4.4K with a growth of +355%.